Hi, Boqun,
On Wed, Jul 28, 2021 at 8:15 PM Boqun Feng <boqun.feng@xxxxxxxxx> wrote:
>
> Hi,
>
> Thanks for the patchset. Seems that your git send-email command doesn't
> add the "In-Reply-to" tag for patch #2 to #5, so they are not threaded
> to patch #1. Not a big deal, but archives or email clients use that
> information to organize emails. You may want to check the command. Also,
> note that you can always use "--dry-run" option to preview the headers
> of your patchset ("--dry-run" won't do the actual send).
Thanks for your advice.
>
> On Wed, Jul 28, 2021 at 07:48:22PM +0800, Rui Wang wrote:
> > From: wangrui <wangrui@xxxxxxxxxxx>
> >
> > This patch introduce a new atomic primitive 'and_or', It may be have three
> > types of implemeations:
> >
> > * The generic implementation is based on arch_cmpxchg.
> > * The hardware supports atomic 'and_or' of single instruction.
> > * The hardware supports LL/SC style atomic operations:
> >
> > 1: ll v1, mem
> > and t1, v1, arg1
> > or t1, t1, arg2
> > sc t1, mem
> > beq t1, 0, 1b
> >
> > Now that all the architectures have implemented it.
> >
> > Signed-by-off: Rui Wang <wangrui@xxxxxxxxxxx>
> > Signed-by-off: hev <r@xxxxxx>
>
> First, this should be "Signed-off-by" ;-) Second, is the second
> "Signed-off-by" a mistake?
Beginner's luck :-)
>
> I will look into this for a review, in the meanwhile, but please add
> some tests in lib/atomic64_test.c, not only it will do the test at
> runtime, also it will generate asm code which helps people to review.
>
> Regards,
> Boqun
>
Regards,
Rui
