On Fri, Jun 04, 2021 at 02:44:22PM +0100, Will Deacon wrote: > On Fri, Jun 04, 2021 at 01:31:48PM +0200, Peter Zijlstra wrote: > > On Fri, Jun 04, 2021 at 11:44:00AM +0100, Will Deacon wrote: > > > On Fri, Jun 04, 2021 at 12:12:07PM +0200, Peter Zijlstra wrote: > > > > > > Usage of volatile_if requires the @cond to be headed by a volatile load > > > > (READ_ONCE() / atomic_read() etc..) such that the compiler is forced to > > > > emit the load and the branch emitted will have the required > > > > data-dependency. Furthermore, volatile_if() is a compiler barrier, which > > > > should prohibit the compiler from lifting anything out of the selection > > > > statement. > > > > > > When building with LTO on arm64, we already upgrade READ_ONCE() to an RCpc > > > acquire. In this case, it would be really good to avoid having the dummy > > > conditional branch somehow, but I can't see a good way to achieve that. > > > > #ifdef CONFIG_LTO > > /* Because __READ_ONCE() is load-acquire */ > > #define volatile_cond(cond) (cond) > > #else > > .... > > #endif > > > > Doesn't work? Bit naf, but I'm thinking it ought to do. > > The problem is with relaxed atomic RMWs; we don't upgrade those to acquire > atm as they're written in asm, but we'd need volatile_cond() to work with > them. It's a shame, because we only have RCsc RMWs on arm64, so it would > be a bit more expensive. Urgh, I see. Compiler can't really help in that case either I'm afraid. They'll never want to modify loads that originate in an asm(). They'll say to use the C11 _Atomic crud.
