Hi Anup, On Mon, May 24, 2021 at 4:03 PM Anup Patel <anup@xxxxxxxxxxxxxx> wrote: > > On Mon, May 24, 2021 at 12:22 PM <guoren@xxxxxxxxxx> wrote: > > > > From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> > > > > Kernel virtual address translation should avoid care asid or it'll > > cause more TLB-miss and TLB-refill. Because the current asid in satp > > belongs to the current process, but the target kernel va TLB entry's > > asid still belongs to the previous process. > > > > Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx> > > Cc: Anup Patel <anup.patel@xxxxxxx> > > Cc: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx> > > First of all thanks for doing this series, I had similar changes in mind > as follow-up to the ASID allocator. > > I went through all three patches and at least I don't see any > obvious issue but I think we should try testing it more on a few > existing platforms. We've tested it on Allwinner D1 C906 and C910 SMP*4 for a long time, just hope it won't affect u540. (In fact, C910 has used ASID allocator for more than two years with our own kernel-tree. I remember we've talked about it in 2019 plumber.) > > Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx> > > Regards, > Anup > > > --- > > arch/riscv/include/asm/pgtable.h | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h > > index 78f2323..017da15 100644 > > --- a/arch/riscv/include/asm/pgtable.h > > +++ b/arch/riscv/include/asm/pgtable.h > > @@ -135,6 +135,7 @@ > > | _PAGE_PRESENT \ > > | _PAGE_ACCESSED \ > > | _PAGE_DIRTY \ > > + | _PAGE_GLOBAL \ > > | _PAGE_CACHE) > > > > #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) > > -- > > 2.7.4 > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
