On Thu, Oct 08, 2020 at 07:16:40PM +0100, Qais Yousef wrote:
> diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
> index 7faae6ff3ab4..c920fa45e502 100644
> --- a/arch/arm64/include/asm/cpu.h
> +++ b/arch/arm64/include/asm/cpu.h
> @@ -15,6 +15,7 @@
> struct cpuinfo_arm64 {
> struct cpu cpu;
> struct kobject kobj;
> + bool aarch32_valid;
As I replied to Greg, I think we can drop this field entirely. But, of
course, please check that the kernel doesn't get tainted if booting on a
non-32-bit capable CPU.
> void cpuinfo_store_cpu(void)
> {
> struct cpuinfo_arm64 *info = this_cpu_ptr(&cpu_data);
> __cpuinfo_store_cpu(info);
> + if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0))
> + __cpuinfo_store_cpu_32bit(info);
> + /*
> + * With asymmetric AArch32 support, populate the boot CPU information
> + * on the first 32-bit capable secondary CPU if the primary one
> + * skipped this step.
> + */
> + if (IS_ENABLED(CONFIG_ASYMMETRIC_AARCH32) &&
> + !boot_cpu_data.aarch32_valid &&
> + id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0)) {
> + __cpuinfo_store_cpu_32bit(&boot_cpu_data);
> + init_cpu_32bit_features(&boot_cpu_data);
> + }
Same here, we can probably drop the boot_cpu_data update here.
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 077293b5115f..0b9aaee1df59 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -1131,6 +1131,16 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu,
> if (!vcpu_has_sve(vcpu))
> val &= ~(0xfUL << ID_AA64PFR0_SVE_SHIFT);
> val &= ~(0xfUL << ID_AA64PFR0_AMU_SHIFT);
> +
> + if (!system_supports_sym_32bit_el0()) {
> + /*
> + * We could be running on asym aarch32 system.
> + * Override to present a aarch64 only system.
> + */
> + val &= ~(0xfUL << ID_AA64PFR0_EL0_SHIFT);
> + val |= (ID_AA64PFR0_EL0_64BIT_ONLY << ID_AA64PFR0_EL0_SHIFT);
> + }
With the sanitised registers using the lowest value of this field, I
think we no longer need this explicit masking.
--
Catalin
