Excerpts from Mathieu Desnoyers's message of July 15, 2020 10:27 pm: > ----- On Jul 15, 2020, at 5:48 AM, Nicholas Piggin npiggin@xxxxxxxxx wrote: > [...] >> index 47bd4ea0837d..a4704f405e8d 100644 >> --- a/arch/powerpc/include/asm/exception-64s.h >> +++ b/arch/powerpc/include/asm/exception-64s.h >> @@ -68,6 +68,13 @@ >> * >> * The nop instructions allow us to insert one or more instructions to flush the >> * L1-D cache when returning to userspace or a guest. >> + * >> + * powerpc relies on return from interrupt/syscall being context synchronising >> + * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SYNC_CORE >> + * without additional additional synchronisation instructions. soft-masked >> + * interrupt replay does not include a context-synchronising rfid, but those >> + * always return to kernel, the context sync is only required for IPIs which >> + * return to user. >> */ >> #define RFI_FLUSH_SLOT \ >> RFI_FLUSH_FIXUP_SECTION; \ > > I suspect the statement "the context sync is only required for IPIs which return to > user." is misleading. > > As I recall that we need more than just context sync after IPI. We need context sync > in return path of any trap/interrupt/system call which returns to user-space, else > we'd need to add the proper core serializing barriers in the scheduler, as we had > to do for lazy tlb on x86. > > Or am I missing something ? Maybe ambiguous wording. For IPIs, the context synch is only required for those which return to user. Other things also require context sync. I will try to improve it. Thanks, Nick
