On Thu, 25 Jun 2020 16:03:08 +0800, Zhenyu Ye wrote:
> In order to reduce the cost of TLB invalidation, ARMv8.4 provides
> the TTL field in TLBI instruction. The TTL field indicates the
> level of page table walk holding the leaf entry for the address
> being invalidated. This series provide support for this feature.
>
> When ARMv8.4-TTL is implemented, the operand for TLBIs looks like
> below:
>
> [...]
Applied to arm64 (for-next/tlbi), thanks!
[3/6] arm64: Add tlbi_user_level TLB invalidation helper
https://git.kernel.org/arm64/c/e735b98a5fe0
[4/6] tlb: mmu_gather: add tlb_flush_*_range APIs
https://git.kernel.org/arm64/c/2631ed00b049
[5/6] arm64: tlb: Set the TTL field in flush_tlb_range
https://git.kernel.org/arm64/c/c4ab2cbc1d87
[6/6] arm64: tlb: Set the TTL field in flush_*_tlb_range
https://git.kernel.org/arm64/c/a7ac1cfa4c05
I haven't included the first 2 patches as I rebased the above on top of
Marc's TTL branch:
git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/ttl-for-arm64
--
Catalin
