On 2020/6/1 19:56, Catalin Marinas wrote: > Hi Zhenyu, > > On Sat, May 30, 2020 at 06:24:21PM +0800, Zhenyu Ye wrote: >> On 2020/5/26 22:52, Catalin Marinas wrote: >>> On Mon, May 25, 2020 at 03:19:42PM +0800, Zhenyu Ye wrote: >>>> tlb_flush_##_pxx##_range() is used to set tlb->cleared_*, >>>> flush_##_pxx##_tlb_range() will actually flush the TLB entry. >>>> >>>> In arch64, tlb_flush_p?d_range() is defined as: >>>> >>>> #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) >>>> #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end) >>> >>> Currently, flush_p??_tlb_range() are generic and defined as above. I >>> think in the generic code they can remain an alias for >>> flush_tlb_range(). >>> >>> On arm64, we can redefine them as: >>> >>> #define flush_pte_tlb_range(vma, addr, end) __flush_tlb_range(vma, addr, end, 3) >>> #define flush_pmd_tlb_range(vma, addr, end) __flush_tlb_range(vma, addr, end, 2) >>> #define flush_pud_tlb_range(vma, addr, end) __flush_tlb_range(vma, addr, end, 1) >>> #define flush_p4d_tlb_range(vma, addr, end) __flush_tlb_range(vma, addr, end, 0) >>> >>> (unless the compiler optimises away all the mmu_gather stuff in your >>> macro above but they don't look trivial to me) >> >> I changed generic code before considering that other structures may also >> use this feature, such as Power9. And Peter may want to replace all >> flush_tlb_range() by tlb_flush() in the future, see [1] for details. >> >> If only enable this feature on aarch64, your codes are better. >> >> [1] https://lore.kernel.org/linux-arm-kernel/20200402163849.GM20713@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx/ > > But we change the semantics slightly if we implement these as > mmu_gather. For example, tlb_end_vma() -> tlb_flush_mmu_tlbonly() ends > up calling mmu_notifier_invalidate_range() which it didn't before. I > think we end up invoking the notifier unnecessarily in some cases (see > the comment in __split_huge_pmd()) or we end up calling the notifier > twice (e.g. pmdp_huge_clear_flush_notify()). > Yes, so only enable this feature on aarch64 may be better. I will change this in V4 of this series. [the v3 only has some minor changes and can be ignored :)] >>> Also, I don't see the new flush_pte_* and flush_p4d_* macros used >>> anywhere and I don't think they are needed. The pte equivalent is >>> flush_tlb_page() (we need to make sure it's not used on a pmd in the >>> hugetlb context). >> >> flush_tlb_page() is used to flush only one page. If we add the >> flush_pte_tlb_range(), then we can use it to flush a range of pages in >> the future. > > If we know flush_tlb_page() is only called on a small page, could we add > TTL information here as well? > Yes, we could. I will add this in flush_tlb_page(). >> But flush_pte_* and flush_p4d_* macros are really not used anywhere. I >> will remove them in next version of series, and add them if someone >> needs. > > I think it makes sense. > Thanks, Zhenyu
