On 12/16/19 9:00 PM, Peter Zijlstra wrote:
On Mon, Dec 16, 2019 at 04:14:19PM +0100, Peter Zijlstra wrote:
On Mon, Dec 16, 2019 at 03:50:41PM +0100, Peter Zijlstra wrote:
On Mon, Dec 16, 2019 at 07:24:24PM +0530, Aneesh Kumar K.V wrote:
So __p*_free_tlb() routines on ppc64 just mark that we need a page walk
cache flush and the actual flush in done in tlb_flush_mmu.
Not quite, your __p*_free_tlb() goes to pgtable_free_tlb() which call
tlb_remove_table().
As per
d86564a2f085b79ec046a5cba90188e61235280 (mm/tlb, x86/mm: Support
invalidating TLB caches for RCU_TABLE_FREE ) that is not sufficient?
96bc9567cbe1 ("asm-generic/tlb, arch: Invert CONFIG_HAVE_RCU_TABLE_INVALIDATE")
And no. Since you have TABLE_NO_INVALIDATE set, tlb_remove_table() will
not TLBI when it fails to allocate a batch page, which is an error for
PPC-Radix.
There is also no TLBI when the batch page is full and the RCU callback
happens, which is also a bug on PPC-Radix.
It seems to me you need something like this here patch, all you need to
add is a suitable definition of tlb_needs_table_invalidate() for Power.
I'm thinking this:
#define tlb_needs_table_invalidate() radix_enabled()
should work for you. When you have Radix you need that TLBI, if you have
Hash you don't.
yes. I was doing something similar with #ifdef around
tlb_table_invalidate(). I will take your approach rather than an arch
override of tlb_table_invalidate()
-aneesh
