On Fri, May 03, 2019 at 12:19:21PM -0400, Alan Stern wrote: > On Fri, 3 May 2019, Peter Zijlstra wrote: > > > On Fri, May 03, 2019 at 07:53:26AM -0700, Paul E. McKenney wrote: > > > Hello, Alan, > > > > > > Just following up on the -rcu commit below. I believe that it needs > > > some adjustment given Peter Zijlstra's addition of "memory" to the x86 > > > non-value-returning atomics, but thought I should double-check. > > > > Right; I should get back to that thread... > > The real question, still outstanding, is whether smp_mb__before_atomic > orders anything following the RMW instruction (and similarly, whether > smp_mb__after_atomic orders anything preceding the RMW instruction). Yes -- that was very much the intent, and only (some) x86 ops and (some) MIPS config have issues with that.
