Re: [RESEND PATCH v3 09/11] powerpc/mm/radix: mark __radix__flush_tlb_range_psize() as __always_inline

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Le 23/04/2019 à 05:49, Masahiro Yamada a écrit :
This prepares to move CONFIG_OPTIMIZE_INLINING from x86 to a common
place. We need to eliminate potential issues beforehand.

How did you identify the functions requiring __always_inline as this one ? Just by 'test and see if it fails', or did you have some script or so ?

Here the problem is that one of the parameters of the function are used as "immediate" constraint for the inline assembly, therefore requiring the function to always be inline.

I guess this should be explained in the commit log and I'm wondering how you ensure that you did identify all functions like this.

Christophe


If it is enabled for powerpc, the following error is reported:

arch/powerpc/mm/tlb-radix.c: In function '__radix__flush_tlb_range_psize':
arch/powerpc/mm/tlb-radix.c:104:2: error: asm operand 3 probably doesn't match constraints [-Werror]
   asm volatile(PPC_TLBIEL(%0, %4, %3, %2, %1)
   ^~~
arch/powerpc/mm/tlb-radix.c:104:2: error: impossible constraint in 'asm'

Signed-off-by: Masahiro Yamada <yamada.masahiro@xxxxxxxxxxxxx>
---

Changes in v3: None
Changes in v2:
   - split into a separate patch

  arch/powerpc/mm/tlb-radix.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index 6a23b9ebd2a1..a2b2848f0ae3 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.c
@@ -928,7 +928,7 @@ void radix__tlb_flush(struct mmu_gather *tlb)
  	tlb->need_flush_all = 0;
  }
-static inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
+static __always_inline void __radix__flush_tlb_range_psize(struct mm_struct *mm,
  				unsigned long start, unsigned long end,
  				int psize, bool also_pwc)
  {




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