> -----Original Message----- > From: Guo Ren <guoren@xxxxxxxxxx> > Sent: Wednesday, April 24, 2019 03:08 > To: Gary Guo <gary@xxxxxxxxxxx> > Cc: Christoph Hellwig <hch@xxxxxx>; linux-arch@xxxxxxxxxxxxxxx; Palmer > Dabbelt <palmer@xxxxxxxxxx>; Andrew Waterman <andrew@xxxxxxxxxx>; Arnd > Bergmann <arnd@xxxxxxxx>; Anup Patel <anup.patel@xxxxxxx>; Xiang > Xiaoyan <xiaoyan_xiang@xxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx; Mike > Rapoport <rppt@xxxxxxxxxxxxx>; Vincent Chen <vincentc@xxxxxxxxxxxxx>; > Greentime Hu <green.hu@xxxxxxxxx>; ren_guo@xxxxxxxxx; linux- > riscv@xxxxxxxxxxxxxxxxxxx; Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>; > Robin Murphy <robin.murphy@xxxxxxx>; Scott Wood <swood@xxxxxxxxxx>; > tech-privileged@xxxxxxxxxxxxxxx > Subject: Re: [PATCH] riscv: Support non-coherency memory model > > Hi Gary, > > On Tue, Apr 23, 2019 at 03:57:30PM +0000, Gary Guo wrote: > > >>> Another point is we could get more attribute bits by modify the riscv > > >>> spec: > > >>> - Remove Global bit, I think it's duplicate with the User bit in linux. > > >> > > >> It is in Linux, but it is conceptually very different. > > > Yes, but hardware could ignore one of them and in riscv linux > > > _PAGE_GLOBAL is no use at all, see: > > > grep _PAGE_GLOBAL arch/riscv -r > > > > > > In fact, the _PAGE_KERNEL for pte doesn't contain _PAGE_GLOBAL and it > > > works on FU540 and qemu. As I've mentioned page attribute bits is very > > > precious, define a useless bit make people confused. > > > > > > > The fact that it isn't used yet doesn't imply it is not useful. We don't > > use ASIDs at the moment, and without using ASIDs the "global" bit is > > indeed not useful. However with ASIDs the bit will be vital for saving > > TLB spaces. Without the global bit, the kernel pages become synonyms to > > themselves (i.e. they have different tags in TLB but refer to the same > > physical page). > > > > The global bit also exists in many other ISAs as well. It's definitely > > not a "useless" bits. > > > > Moreover, this bit is already implemented in both Rocket and Ariane. It > > is also in the spec for quite a while. The fact that Linux doesn't use > > it at the moment is not a reason for removing it. > > > > Look: > linux-next git:(riscv_asid_allocator_v2)$ grep GLOBAL arch/riscv -r > arch/riscv/include/asm/pgtable-bits.h:#define _PAGE_GLOBAL (1 << 5) /* > Global */ > arch/riscv/include/asm/pgtable-bits.h: _PAGE_USER | > _PAGE_GLOBAL)) > > Your patch tell us _PAGE_USER and _PAGE_GLOBAL are duplicate and why we > couldn't make _PAGE_USER implies _PAGE_GLOBAL? Can you give an example > of a real scene in PTE about: > _PAGE_USER:0 + _PAGE_GLOBAL:1 > or > _PAGE_USER:1 + _PAGE_GLOBAL:0 > > Of cause I know USER & GLOBAL are conceptually very different, but > there are only 10 attribute-bits for riscv (In fact we've wasted two bits > to support huge RV32-pfn :P). So I think it is time to merge these two bits > before hardware supports GLOBAL. Reserve them for future! Two cases I can think of: * vdso like things. They're user pages that can really be shared across address spaces (i.e. global). Kernels like L4 implement most systems calls similar to VDSO, so USER + GLOBAL is useful. * hypervisor without H-extension: This requires shadow page tables. Supervisor pages are mapped to supervisor shadow pages. However these shadow pages cannot be GLOBAL because they can't be shared between VMs. So !USER + !GLOBAL is useful. Remember Linux isn't the only supervisor software that RISC-V cares! > > Best Regards > Guo Ren
