On Wed, Sep 05, 2018 at 07:45:12PM -0500, Rob Herring wrote:
> On Wed, Sep 5, 2018 at 7:09 AM Guo Ren <ren_guo@xxxxxxxxx> wrote:
> >
> > Signed-off-by: Guo Ren <ren_guo@xxxxxxxxx>
> > ---
> > .../bindings/interrupt-controller/csky,mpintc.txt | 40 ++++++++++++++++++++++
> > 1 file changed, 40 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
> >
> > diff --git a/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
> > new file mode 100644
> > index 0000000..49d1658
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/csky,mpintc.txt
> > @@ -0,0 +1,40 @@
> > +===========================================
> > +C-SKY Multi-processors Interrupt Controller
> > +===========================================
> > +
> > +C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
> > +SMP soc, and it also could be used in non-SMP system.
>
> How is it accessed? No mmio registers?
Mmio reg base is got from cpu-coprocessor register and I'll detail
it here in next version patch.
csky_mpintc_init(struct device_node *node, struct device_node *parent)
{
...
INTCG_base = ioremap(mfcr("cr<31, 14>"), INTC_SIZE);
