I'm just looking around TLB flushing and noticed a few issues with
the core code. The first one seems pretty straightforward, unless I
missed something, but the TLB flush pattern after the revert seems
okay.
The second one might be a bit more interesting for other architectures
and the big comment in include/asm-generic/tlb.h and linked mail from
Linus gives some good context.
I suspect mmu notifiers should use this precise TLB range too, because
I don't see how they could care about the page table structure under
the mapping. Although I only use it in powerpc so far.
Comments?
Thanks,
Nick
Nicholas Piggin (3):
Revert "mm: always flush VMA ranges affected by zap_page_range"
mm: mmu_gather track of invalidated TLB ranges explicitly for more
precise flushing
powerpc/64s/radix: optimise TLB flush with precise TLB ranges in
mmu_gather
arch/powerpc/mm/tlb-radix.c | 7 +++++--
include/asm-generic/tlb.h | 27 +++++++++++++++++++++++++--
mm/memory.c | 18 ++++--------------
3 files changed, 34 insertions(+), 18 deletions(-)
--
2.17.0
