On Fri, 2018-03-30 at 12:49 +0800, Yisheng Xie wrote: > Zhou reported a bug on Hisilicon arm64 D06 platform with 64KB page size: : > The cause is the size of PCI IO resource is 32KB, which is 4K aligned but > not 64KB aligned, so when do ioremap_pte_range(), its incoming end is not > PAGE_ALIGN on 64KB page size system, but ioremap_pte_range increase the > addr by PAGE_SIZE, which makes addr != end until trigger BUG_ON. > > This patch introduces pte_addr_end(addr, end) to resolve this problem, just > as what pmd_addr_end do. When end is not PAGE_ALIGN, it will return end > instead of addr + PAGE_SIZE, therefore ioremap_pte_range() can break out > when real end is coming. ioremap_pte_range() assumes that addr and end are aligned by PAGE_SIZE. While some improvement can be made in the range check and documentation, I do not think it is safe for letting this library function to map outside of a requested range blindly. Can you change the caller of ioremap_page_range() to align the request by PAGE_SIZE so that the caller is aware of what it's asking for? Thanks, -Toshi
