On Mon, 25 Sep 2017, Tejun Heo wrote: > Hello, > > On Mon, Sep 25, 2017 at 04:33:02PM +0100, Mark Rutland wrote: > > Unfortunately, the generic this_cpu_read(), which is intended to be > > irq-safe, is not: > > > > #define this_cpu_generic_read(pcp) \ > > ({ \ > > typeof(pcp) __ret; \ > > preempt_disable_notrace(); \ > > __ret = raw_cpu_generic_read(pcp); \ > > preempt_enable_notrace(); \ > > __ret; \ > > }) > > I see. Yeah, that looks like the bug there. This is a single fetch operation of a value that needs to be atomic. It really does not matter if an interrupt happens before or after that load because it could also occur before or after the preempt_enable/disable without the code being able to distinguish that case. The fetch of a scalar value from memory is an atomic operation and that is required from all arches. There is an exception for double word fetches. Maybe we would need to special code that case but so far this does not seem to have been an issue.