On Fri, Jun 23, 2017 at 05:49:15PM +0300, Kirill A. Shutemov wrote: > On Fri, Jun 23, 2017 at 11:06:01AM +0200, Ingo Molnar wrote: > > > > * Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> wrote: > > > > > As Ingo requested I've split and updated last two patches for my previous > > > patchset. > > > > > > Please review and consider applying. > > > > > > Kirill A. Shutemov (5): > > > x86: Enable 5-level paging support > > > x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit > > > x86/mpx: Do not allow MPX if we have mappings above 47-bit > > > x86/mm: Prepare to expose larger address space to userspace > > > x86/mm: Allow userspace have mapping above 47-bit > > > > Ok, looks pretty neat now. > > > > Can I apply them in this order cleanly, without breaking bisection: > > > > > x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit > > > x86/mpx: Do not allow MPX if we have mappings above 47-bit > > > x86/mm: Prepare to expose larger address space to userspace > > > x86/mm: Allow userspace have mapping above 47-bit > > > x86: Enable 5-level paging support > > > > ? > > > > I.e. I'd like to move the first patch last. > > > > The reason is that we should first get all quirks and assumptions fixed, all > > facilities implemented - and only then enable 5-level paging as a final step which > > produces a well working kernel. > > > > (This should also make it slightly easier to analyze any potential regressions in > > earlier patches.) > > Just checked bisectability with this order on allmodconfig -- works fine. Ingo, if there's no objections, can we get these applied? -- Kirill A. Shutemov
