On Wed, 05 Apr 2017 07:01:57 -0700 (PDT) David Miller <davem@xxxxxxxxxxxxx> wrote: > From: Nicholas Piggin <npiggin@xxxxxxxxx> > Date: Tue, 4 Apr 2017 13:02:33 +1000 > > > On Mon, 3 Apr 2017 17:43:05 -0700 > > Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx> wrote: > > > >> But that depends on architectures having some pattern that we *can* > >> abstract. Would some "begin/in-loop/end" pattern like the above be > >> sufficient? > > > > Yes. begin/in/end would be sufficient for powerpc SMT priority, and > > for x86, and it looks like sparc64 too. So we could do that if you > > prefer. > > Sparc64 has two cases, on older chips we can induce a cpu thread yield > with a special sequence of instructions, and on newer chips we have > a bonafide pause instruction. > > So cpu_relax() all by itself pretty much works for us. > Thanks for taking a look. The default spin primitives should just continue to do the right thing for you in that case. Arm has a yield instruction, ia64 has a pause... No unusual requirements that I can see. If there are no objections, I'll send the arch-independent part of this through the powerpc tree (the last one I sent, which follows Linus' preferred pattern). Thanks, Nick
