On Fri, Feb 26, 2016 at 06:50:57AM -0800, Paul E. McKenney wrote: > Hello! Hi Paul, > Do ARM, MIPS, and IA64 data/address/control dependencies apply to loads > and stores from vector instructions? The use case appears to be that the > dependency chain is headed by a normal load instruction, and a dependency > to a later vector load/store is desired. > > Any other weakly ordered architectures with vector instructions? We certainly have instructions that don't honour address dependencies, for example LDNP (load non-temporal pair), and these could be used by variants of memcpy. x86 has something similar with MOVNTDQA[1]. It's highly likely that we'd consider similar relaxations for extensions to our vector instructions in future revisions of the ARM architecture, so I don't think we should generally rely on address dependencies providing order for vectorised code. Will [1] http://www.felixcloutier.com/x86/MOVNTDQA.html -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
