On Tue, Feb 02, 2016 at 11:41:56PM +0300, Yury Norov wrote: > On Tue, Feb 02, 2016 at 08:54:34PM +0100, Heiko Carstens wrote: > > So I think I can summarize my point to: if you can enforce correctness, why > > shouldn't you do it if the performance impact is only a single instruction. > > For aarch64 it's 5 instructions. But what's more important (if ever), > another wrapper takes another i-cache line... > <compat_SyS_ftruncate>: > stp x29, x30, [sp,#-16]! > mov x29, sp > bl d40 <do_sys_ftruncate.constprop.3> > ldp x29, x30, [sp],#16 > ret Why does gcc allocate a stackframe here? Don't you have tail call optimization? -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
