On Thursday 01 October 2015 05:52 PM, Arnd Bergmann wrote:
> On Thursday 01 October 2015 17:48:21 Vineet Gupta wrote:
>> Currently memory node parsing uses root "#size-cells", "#address-cells"
>> This doesn't work correctly when memory address/size is different or
>> greater than root's.
>>
>> e.g. ARC 32-bit systems implementing physical adressing extension and
>> say 4GB of memory. All peripherals mappings stay within the 4GB (so root
>> address/size cells remain 1 each), only the memory node address/size
>> cells needs to specify greater than 32-bits as below
>>
>> memory {
>> device_type = "memory";
>> reg = <0x0 0x80000000 0x1 0x00000000>; /* 4 GB */
>> #address-cells = <2>;
>> #size-cells = <2>;
>> };
>>
>> This patch lets me boot a ARC system with PAE40 + 4GB of memory specified
>> as above and fails to boot otherwise as memory parsing doesn't populate
>> right base, size.
>>
> This looks wrong: the #address-cells property in a device node is used
> to parse the reg property of its child nodes, not the node itself.
>
> The only way to list memory like this is to put #size-cells=<2>
> into the root node. All lower bus nodes can then use the
> normal #address-cells/#size-cells again and use a ranges property
> to convert the register ranges so you don't need to update all
> nodes.
Thx for taking a look Arnd. I changed the DT per your suggestion and that works
equally well.
Thx,
-Vineet
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