Re: [PATCH v2 3/8] ARCv2: perf: implement "event_set_period" for future use with interrupts

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Hi Peter,

On Tue, 2015-08-18 at 19:52 +-0200, Peter Zijlstra wrote:
+AD4- On Wed, Aug 05, 2015 at 06:13:29PM +-0300, Alexey Brodkin wrote:
+AD4- +AD4- Even though this hardware implementation allows for more flexibility,
+AD4- +AD4- in Linux kernel we decided to mimic behavior of other architectures this
+AD4- +AD4- way:
+AD4- +AD4- 
+AD4- +AD4-  +AFs-1+AF0- Set limit value as half of counter's max value (to allow counter to
+AD4- +AD4-      run after reaching it limit, see below for more explanation):
+AD4- +AD4-  ----------+AD4-8-----------
+AD4- +AD4-  arc+AF8-pmu-+AD4-max+AF8-period +AD0- (1ULL +ADwAPA- counter+AF8-size) / 2 - 1ULL+ADs-
+AD4- +AD4-  ----------+AD4-8-----------
+AD4- 
+AD4- +AD4- +AEAAQA- -317,10 +-365,11 +AEAAQA- static int arc+AF8-pmu+AF8-device+AF8-probe(struct platform+AF8-device +ACo-pdev)
+AD4- +AD4-  		return -ENOMEM+ADs-
+AD4- +AD4-  
+AD4- +AD4-  	arc+AF8-pmu-+AD4-n+AF8-counters +AD0- pct+AF8-bcr.c+ADs-
+AD4- +AD4- -	arc+AF8-pmu-+AD4-counter+AF8-size +AD0- 32 +- (pct+AF8-bcr.s +ADwAPA- 4)+ADs-
+AD4- +AD4- +-	counter+AF8-size +AD0- 32 +- (pct+AF8-bcr.s +ADwAPA- 4)+ADs-
+AD4- +AD4- +-	arc+AF8-pmu-+AD4-max+AF8-period +AD0- (1ULL +ADwAPA- counter+AF8-size) - 1ULL+ADs-
+AD4- +AD4-  
+AD4- 
+AD4- I don't see that /2 there..

My comment was a bit too early.
That +ACI-/2+ACI- was actually introduced in the subsequent commit.

Do you think I need to do a re-spin of that patch with commit
message which matches real code (i.e. no +ACI-/2+ACI-)?

-Alexey--
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