Hi Ben, On Sun, May 25, 2014 at 10:46:03PM +0100, Benjamin Herrenschmidt wrote: > On Thu, 2014-05-22 at 17:47 +0100, Will Deacon wrote: > > A corollary to this is that mmiowb() probably needs rethinking. As it currently > > stands, an mmiowb() is required to order MMIO writes to a device from multiple > > CPUs, even if that device is protected by a lock. However, this isn't often used > > in practice, leading to PowerPC implementing both mmiowb() *and* synchronising > > I/O in spin_unlock. > > > > I would propose making the non-relaxed I/O accessors ordered with respect to > > LOCK/UNLOCK, leaving mmiowb() to be used with the relaxed accessors, if > > required, but would welcome thoughts/suggestions on this topic. > > I agree on the proposed semantics, though for us that does mean we still need > that per-cpu flag tracking non-relaxed MMIO stores and corresponding added barrier > in unlock. Eventually, if the use of the relaxed accessors becomes pervasive > enough I suppose I can just make the ordered ones unconditionally do 2 barriers. Why would you need two barriers? I would have though an mmiowb() inlined into writel after the store operation would be sufficient. Or is this to ensure a non-relaxed write is ordered with respect to a relaxed write? Anyway, we may need something similar for other architectures with mmiowb implementations: blackfin frv ia64 mips sh so I'm anticipating some more discussion when I try to push that patch :) Cheers, Will -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
