Hi André, On 14 January 2013 23:34, André Hentschel <nerv@xxxxxxxxxxx> wrote: > i'm new to the list (my first kernel mailing list). > I'd like to request to add a way to distinguish a read from a write pagefault in userspace on arm64(aarch64). > (That's e.g. in a SIGSEGV handler attached with sigaction and SA_SIGINFO) > On arm you can use the bit at 0x800 in uc_mcontext.error_code to know which kind it is, but on arm64 i can't find a way. > (On most other popular architectures you can get that information, too) > I'd suggest to add a flag to siginfo.si_errno, or to make the esr available to the SIGSEGV handler. The problem with exposing ESR directly to user is that it depends on the MMU configuration (e.g. on Cortex-A15 (32-bit) you have different formats based on whether you have LPAE enabled or not, though the 'write' bit happens to be in the same position). siginfo for SIGSEGV gives the fault address and type information but, as you noticed, doesn't say whether it's a read or write. What do you need this information for? -- Catalin -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
