On Tue, Aug 14, 2012 at 7:52 PM, Catalin Marinas
<catalin.marinas@xxxxxxx> wrote:
> From: Marc Zyngier <marc.zyngier@xxxxxxx>
(...)
> +static void __init arch_timer_calibrate(void)
I think you wrot in the last review thread that this should be renamed
"arch_timer_get_freq()".
> +{
> + if (arch_timer_rate == 0) {
> + arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0);
> + arch_timer_rate = arch_timer_reg_read(ARCH_TIMER_REG_FREQ);
> +
> + /* Check the timer frequency. */
> + if (arch_timer_rate == 0)
> + panic("Architected timer frequency is set to zero.\n"
> + "You must set this in your .dts file\n");
This comment about the .dts file is completely out-of-place.
The error message should be about the register containing 0, right?
Also, at this very point in the code, I think you should convert that panic()
to pr_err() and insert:
#include <linux/clk.h>
struct clk *clk;
clk = clk_get_sys("arm_generic_timer", NULL);
if (IS_ERR(clk))
panic("Not even a clk to get freq off! Giving up.\n");
err = clk_prepare_enable(clk);
if (err) {
pr_err("smp_twd: clock failed to prepare: %d\n", err);
clk_put(clk);
panic("Not even a clk to get freq off! Giving up.\n");
}
arch_timer_rate = clk_get_rate(clk);
Possibly the clk should even be able to override the register value,
then it's the other way around.
> + }
> +
> + /* Cache the sched_clock multiplier to save a divide in the hot path. */
> +
> + sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
> +
> + pr_info("Architected local timer running at %u.%02uMHz.\n",
> + arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100);
This multiplier and print should be moved below the call site since
the DT frequency
overrides it and then you get no print which is sad, and incorrect
sched_clock_mult
which is a bug.
> +}
(...)
> + /* Try to determine the frequency from the device tree or CNTFRQ */
> + if (!of_property_read_u32(np, "clock-frequency", &freq))
> + arch_timer_rate = freq;
> + arch_timer_calibrate();
rename arch_timer_get_freq()
And move that print here.
Yours,
Linus Walleij
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