On Tuesday 27 September 2011, Mark Salter wrote: > Several SoC parts provide a simple bridge to support external memory mapped > devices. This code probes the device tree for an EMIF node and sets up the > bridge registers if such a node is found. Beyond initial set up, there is no > further need to access the bridge control registers. External devices on the > bus are accessed through their MMIO registers using suitable drivers. The > bridge hardware does provide for timeout and other error interrupts, but these > are not yet supported. > > Signed-off-by: Mark Salter <msalter@xxxxxxxxxx> Acked-by: Arnd Bergmann <arnd@xxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
