On Tuesday 27 September 2011, Mark Salter wrote: > The C6X SoCs contain several PLL controllers each with up to 16 clock outputs > feeding into the cores or peripheral clock domains. The hardware is very similar > to arm/mach-davinci clocks. This is still a work in progress which needs to be > updated once device tree clock binding changes shake out. > > Signed-off-by: Mark Salter <msalter@xxxxxxxxxx> Yes, this will have to be reworked at some point, but it's ok for now as long as there is no generic code to help you do this better. Acked-by: Arnd Bergmann <arnd@xxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
