Re: [PATCH 07/24] C6X: memory management

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On Wednesday 17 August 2011, Mark Salter wrote:
> C6X is never consistent in that there is no hw snooping between main
> memory and L2 cache. There is some cache control however which allows
> us to create a pool of uncached memory for use as consistent DMA memory.
> I think the __dma_is_coherent tries to tell at runtime if the dma handle
> comes from such a pool of consistent memory.
> 
> I'm not aware of any drivers actually needing this although I'm sure TI
> has some. For the purpose of getting the arch accepted, I could just
> punt and take it out for now, simplifying the dma support. It can be
> revisited later if needed.

Yes, sounds good. Not sure if you meant removing all calls to
arch_is_coherent() as well, but I'd suggest you do that, too.
This should further simplify the code by removing code paths
that are unused and untested.

	Arnd
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