From: FUJITA Tomonori <fujita.tomonori@xxxxxxxxxxxxx>
Architectures that handle DMA-non-coherent memory need to set
ARCH_DMA_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe: the
buffer doesn't share a cache with the others.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@xxxxxxxxxxxxx>
Cc: Kyle McMartin <kyle@xxxxxxxxxxx>
Cc: Helge Deller <deller@xxxxxx>
Cc: James E.J. Bottomley <jejb@xxxxxxxxxxxxxxxx>
Cc: <linux-arch@xxxxxxxxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
arch/parisc/include/asm/cache.h | 2 ++
1 file changed, 2 insertions(+)
diff -puN arch/parisc/include/asm/cache.h~dma-mapping-parisc-set-arch_dma_minalign arch/parisc/include/asm/cache.h
--- a/arch/parisc/include/asm/cache.h~dma-mapping-parisc-set-arch_dma_minalign
+++ a/arch/parisc/include/asm/cache.h
@@ -28,6 +28,8 @@
#define SMP_CACHE_BYTES L1_CACHE_BYTES
+#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
+
#define __read_mostly __attribute__((__section__(".data..read_mostly")))
void parisc_cache_init(void); /* initializes cache-flushing */
_
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