From: Arnd Bergmann <arnd@xxxxxxxx> All PIO on MIPS platforms is memory mapped, so there is no benefit in the lib/iomap.c wrappers that switch between inb/outb and readb/writeb style accessses. In fact, the '#define PIO_RESERVED 0' setting completely disables the GENERIC_IOMAP functionality, and the '#define PIO_OFFSET mips_io_port_base' setting is based on a misunderstanding of what the offset is meant to do. MIPS started using GENERIC_IOMAP in 2018 with commit b962aeb02205 ("MIPS: Use GENERIC_IOMAP") replacing a simple custom implementation of the same interfaces, but at the time the asm-generic/io.h version was not usable yet. Since the header is now always included, it's now possible to go back to the even simpler version. Use the normal GENERIC_PCI_IOMAP functionality for all mips platforms without the hacky GENERIC_IOMAP, and provide a custom pci_iounmap() for the CONFIG_PCI_DRIVERS_LEGACY case to ensure the I/O port base never gets unmapped. The readsl() prototype needs an extra 'const' keyword to make it compatible with the generic ioread32_rep() alias. Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx> --- arch/mips/Kconfig | 2 +- arch/mips/include/asm/io.h | 21 ++++++++------------- arch/mips/lib/iomap-pci.c | 9 +++++++++ 3 files changed, 18 insertions(+), 14 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 1924f2d83932..2a2120a6d852 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -38,7 +38,6 @@ config MIPS select GENERIC_CMOS_UPDATE select GENERIC_CPU_AUTOPROBE select GENERIC_GETTIMEOFDAY - select GENERIC_IOMAP select GENERIC_IRQ_PROBE select GENERIC_IRQ_SHOW select GENERIC_ISA_DMA if EISA @@ -47,6 +46,7 @@ config MIPS select GENERIC_LIB_CMPDI2 select GENERIC_LIB_LSHRDI3 select GENERIC_LIB_UCMPDI2 + select GENERIC_PCI_IOMAP select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC select GENERIC_SMP_IDLE_THREAD select GENERIC_IDLE_POLL_SETUP diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 0bddb568af7c..1fe56d1870a6 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -66,17 +66,6 @@ static inline void set_io_port_base(unsigned long base) mips_io_port_base = base; } -/* - * Provide the necessary definitions for generic iomap. We make use of - * mips_io_port_base for iomap(), but we don't reserve any low addresses for - * use with I/O ports. - */ - -#define HAVE_ARCH_PIO_SIZE -#define PIO_OFFSET mips_io_port_base -#define PIO_MASK IO_SPACE_LIMIT -#define PIO_RESERVED 0x0UL - /* * Enforce in-order execution of data I/O. In the MIPS architecture * these are equivalent to corresponding platform-specific memory @@ -397,8 +386,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \ } \ } \ \ -static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ - unsigned int count) \ +static inline void reads##bwlq(const volatile void __iomem *mem, \ + void *addr, unsigned int count) \ { \ volatile type *__addr = addr; \ \ @@ -555,6 +544,12 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); void __ioread64_copy(void *to, const void __iomem *from, size_t count); +#ifdef CONFIG_PCI_DRIVERS_LEGACY +struct pci_dev; +void pci_iounmap(struct pci_dev *dev, void __iomem *addr); +#define pci_iounmap pci_iounmap +#endif + #include <asm-generic/io.h> static inline void *isa_bus_to_virt(unsigned long address) diff --git a/arch/mips/lib/iomap-pci.c b/arch/mips/lib/iomap-pci.c index a9cb28813f0b..2f82c776c6d0 100644 --- a/arch/mips/lib/iomap-pci.c +++ b/arch/mips/lib/iomap-pci.c @@ -43,4 +43,13 @@ void __iomem *__pci_ioport_map(struct pci_dev *dev, return (void __iomem *) (ctrl->io_map_base + port); } +void pci_iounmap(struct pci_dev *dev, void __iomem *addr) +{ + struct pci_controller *ctrl = dev->bus->sysdata; + void __iomem *base = (void __iomem *)ctrl->io_map_base; + + if (addr < base || addr > (base + resource_size(ctrl->io_resource))) + iounmap(addr); +} + #endif /* CONFIG_PCI_DRIVERS_LEGACY */ -- 2.39.5