On Tue, 2010-02-09 at 18:03 +0000, Catalin Marinas wrote: > > These were not intended to create any additional mapping, more like > the > dma_map_single() functions and only do the necessary flushing. > > AFAICT, an HCD driver would call the pio_map_range() once to get the > address of the buffer and than wait for it to be filled in (e.g. via > interrupts). When it is full, it would call pio_unmap_range(). So even > if we do it per page, you still need to map the same amount of memory, > unless we modify the HCD drivers but I don't think this would be very > popular. > > Maybe the name choosing is wrong. Would something like pio_begin() and > pio_end() work better for already mapped buffers? >From your initial email, your problem isn't a VIVT cache aliasing but an I$/D$ cache coherency problem with PIPT right ? In that case, I would recommend you look at how this is already dealt with on existing archs such as powerpc, using PG_arch1 in struct page to keep track of whether a given page is clean for execution and mapping pages that aren't non-exec so the kernel gets a chance to clean them once when execution happens. We have some faster path nowadays to do that on the first fault which you take anyways (at least most of the time) at set_pte() time to avoid double faults so the cost is minimum I believe. Cheers, Ben. -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
