On Thu, Jun 04, 2009 at 03:38:03PM +0100, Russell King wrote:
> On Thu, Jun 04, 2009 at 02:42:52PM +0100, Arnd Bergmann wrote:
> > The device sets a mask (really a limit) of the address ranges it can
> > handle. Basically every user in the kernel currently passes DMA_BIT_MASK()
> > limit into {dma,pci}_set_mask, and I am not aware of any driver
> > that needs something more fancy. If you know one, please tell us.
BTW, I don't think you really got my point about DMA mask being a mask
or being a limit.
The following assumption has been made by the kernel:
maximum_physical_address = dma_mask
Yes, that's _physical_ address, not bus specific DMA address:
void blk_queue_bounce_limit(struct request_queue *q, u64 dma_mask)
{
unsigned long b_pfn = dma_mask >> PAGE_SHIFT;
...
q->bounce_pfn = b_pfn;
}
static unsigned int __blk_recalc_rq_segments(struct request_queue *q,
struct bio *bio)
{
...
high = page_to_pfn(bv->bv_page) > q->bounce_pfn;
}
It's not "is this page DMA-able according to the DMA mask" it's effectively
"is this page's physical address greater than the maximum physical address
that can be DMA'd from".
As I've already pointed out, there are ARM platforms where this is just
a total nonsense.
As I say, what is the DMA mask? Is it really a limit? Is it really
supposed to be a mask?
--
Russell King
Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/
maintainer of:
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