On Monday 01 June 2009, Russell King wrote: > So, on a non-DMA coherent cache architecture, when DMA is normally > performed the data ends up in RAM with the cache flushed for that > region. If, instead dma_map_single uses a bounce buffer to do that > DMA, then the same needs to be true of the original buffer - the > data needs to be in RAM with the cache flushed. While this seems logical from a correctness perspective, I would like to understand why it actually matters. Flushing the cache on the original buffer will impact performance but doesn't generally make a difference to users. In cases where you need the cache to be flushed for aliasing reasons (VIPT caches...), the architecture specific code should flush that buffer somewhere, but do we really need to flush it for all architectures? Arnd <>< -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
