> Now, IDE controllers that we end up using PIO on all tend to be pretty > old, but admittedly even the old ones are faster than the worst-case > timings, so in practice you're not looking quite at that kind of horror > case, but you're still looking at each sector transfer (256 16-bit words) > taking on the order of tens of us. The worst case timings are far worse because of IORDY. > Now: I suspect you don't have a single machine that does PIO by default, > and you probably haven't had any for the last ten years. These things > _are_ old. But they do exist. I bet you do for some stuff. Most CF cards are PIO only. Several controllers need to do PIO for some corner cases. Almost all pre-AHCI controllers issue command blocks via PIO. Worse still of course some controllers have an erratum where touching some of the other registers during a transfer [which is what you need to do to see if you are the IRQ source] corrupts the transfer. Not all devices honour the IRQ masking bit on the device either. That makes the generalised case of doing both unmasked transfers after an IRQ and the errata cases of handling IRQs you can't mask and must leave disabled rather more exciting than is nice. Alan -- To unsubscribe from this list: send the line "unsubscribe linux-arch" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
