On 9/3/2020 7:26 AM, Dave Hansen wrote:
On 9/2/20 9:35 PM, Andy Lutomirski wrote:
+ fpu__prepare_read(fpu);
+ cetregs = get_xsave_addr(&fpu->state.xsave, XFEATURE_CET_USER);
+ if (!cetregs)
+ return -EFAULT;
Can this branch ever be hit without a kernel bug? If yes, I think
-EFAULT is probably a weird error code to choose here. If no, this
should probably use WARN_ON(). Same thing in cetregs_set().
When a thread is not CET-enabled, its CET state does not exist. I looked at EFAULT, and it means "Bad address". Maybe this can be ENODEV, which means "No such device"?
Having read the code, I’m unconvinced. It looks like a get_xsave_addr() failure means “state not saved; task sees INIT state”. So *maybe* it’s reasonable -ENODEV this, but I’m not really convinced. I tend to think we should return the actual INIT state and that we should permit writes and handle them correctly.
PTRACE is asking for access to the values in the *registers*, not for
the value in the kernel XSAVE buffer. We just happen to only have the
kernel XSAVE buffer around.
When get_xsave_addr() returns NULL, there are three possibilities:
- XSAVE is not enabled or not supported;
- The kernel does not support the requested feature;
- The requested feature is in INIT state.
If the debugger is going to write an MSR, only in the third case would
this make a slight sense. For example, if the system has CET enabled,
but the task does not have CET enabled, and GDB is writing to a CET MSR.
But still, this is strange to me.
If we want to really support PTRACE we have to allow the registers to be
get/set, regardless of what state they are in, INIT state or not. So,
yeah I agree with Andy.
GDB does not have a WRMSR mechanism. If GDB is going to write an MSR,
it will call arch_prctl or an assembly routine in memory.
Yu-cheng
