On Mon, Nov 27, 2017 at 9:15 PM, Wu Hao <hao.wu@xxxxxxxxx> wrote: > On Mon, Nov 27, 2017 at 10:28:04AM +0000, David Laight wrote: >> From: Wu Hao >> > Sent: 27 November 2017 06:42 >> > From: Zhang Yi <yi.z.zhang@xxxxxxxxx> >> > >> > The Intel FPGA device appears as a PCIe device on the system. This patch >> > implements the basic framework of the driver for Intel PCIe device which >> > is located between CPU and Accelerated Function Units (AFUs), and has >> > the Device Feature List (DFL) implemented in its MMIO space. >> >> This ought to have a better name than 'Intel FPGA'. >> An fpga can be used for all sorts of things, this looks like >> a very specific architecture using a common VHDL environment to >> allow certain types of user VHDL be accessed over PCIe. > > Hi David > > This patch adds a pcie device driver for Intel FPGA devices which implements > the DFL, e.g Intel Server Platform with In-package FPGA and Intel FPGA PCIe > Acceleration Cards. They are pcie devices, and all have DFL implemented in > the MMIO space, so we would like to use one kernel driver to handle them. > > With this full patchset, it just provides user the interfaces to configure > and access the FPGA accelerators on Intel DFL based FPGA devices. For sure, > users can develop and build their own logics via tools provided by Intel, > program them to accelerators on these Intel FPGA devices, and access them > for their workloads. I don't see anything Intel specific here. This could all be named dfl-* Alan > > Thanks > Hao -- To unsubscribe from this list: send the line "unsubscribe linux-api" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
