On Wed, Aug 13, 2014 at 4:25 PM, David Miller <davem@xxxxxxxxxxxxx> wrote: > From: David Laight <David.Laight@xxxxxxxxxx> > Date: Wed, 13 Aug 2014 08:52:30 +0000 > >> From: Of Alexei Starovoitov >>> one more RFC... >>> >>> Major difference vs previous set is a new 'load 64-bit immediate' eBPF insn. >>> Which is first 16-byte instruction. It shows how eBPF ISA can be extended >>> while maintaining backward compatibility, but mainly it cleans up eBPF >>> program access to maps and improves run-time performance. >> >> Wouldn't it be more sensible to follow the scheme used by a lot of cpus >> and add a 'load high' instruction (follow with 'add' or 'or'). >> It still takes 16 bytes to load a 64bit immediate value, but the instruction >> size remains constant. >> There is nothing to stop any JIT software detecting the instruction pair. > > The opposite argument is that JITs can expand the IMM64 load into whatever > sequence of instructions is most optimal. > > My only real gripe with IMM64 loads is that it's not mainly for > loading an immediate, it's for loading a pointer. And this > distinction is important for some JITs. > > For example, on sparc64 all symbol based addresses are actually 32-bit > because of the code model we use to compile the kernel and all modules. > So if we knew this is a pointer load and it's to a symbol in a kernel > or module image, we could do a 32-bit load. This is true for x86_64 as well, I think. (Almost. For x86_64 we have a choice between a sign-extended load of a value in the top 2GB of the address space and lea reg,offset(%rip).) --Andy -- To unsubscribe from this list: send the line "unsubscribe linux-api" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
