On Wed, 27 Feb 2019, Sinan Kaya wrote: > What we missed is the fact that alpha reorders accesses across two > register accesses. This is guaranteed in other architectures. Not for MIPS either. Maciej
On Wed, 27 Feb 2019, Sinan Kaya wrote: > What we missed is the fact that alpha reorders accesses across two > register accesses. This is guaranteed in other architectures. Not for MIPS either. Maciej