On 8/20/2018 5:50 PM, Maciej W. Rozycki wrote:
That is that the caller must not assume that writes issued by `writeX' calls will be observed in order on the external bus or specifically by the device addressed.
Where do you see it? I interpret that two writeX() need to be observed in order with respect to each other without requiring an explicit barrier. Same goes for reads.Hardware can reshuffle things on flight for performance but observability is the critical piece here for correctness.
