On Sun, Aug 19, 2018 at 5:28 PM Sinan Kaya <okaya@xxxxxxxxxxxxxx> wrote:
>
> On 8/19/2018 11:21 AM, Arnd Bergmann wrote:
> >> This matches my understanding of mmiowb. In fact, mmiowb is a powerpc
> >> thing. All other architectures stub out.
> > There are a few architectures that define mmiowb to something other
> > than a nop: some ia64, some mips and sh in particular, plus also the
> > new riscv.
> >
> > It does make some sense that alpha might need a barrier between
> > an mmio store and a spin_unlock, but it was decided earlier to make
> > that barrier implied by the writel() function rather than require an
> > explicit mmiowb after it.
>
> I see. When I talked to PowerPC guys a couple of months ago, they told
> me that they keep a dirty flag to keep track of mmiowb() required
> condition on each writel() execution.
>
> If the dirty flag is set; they issue the mmiowb() inside the
> spin_unlock() function.
>
> Sounds like we need a similar solution for all architectures that
> require mmiowb().
That depends on how expensive the barrier is on a given architecture.
It's possible that doing adding the barrier every time is actually
cheaper than keeping track of whether it's needed.
Arnd
