Hi Alpha Maintainers, memory-barriers.txt has been updated not to require a wmb() before writel() since Linus asked all infrastructures to follow Intel paradigm where writes are ordered and they do not require a barrier between a memory update and HW observation. https://www.mail-archive.com/netdev@xxxxxxxxxxxxxxx/msg225806.html https://lkml.org/lkml/2018/3/27/431 We have been auditing all architectures to see if they follow this requirement or not. Arnd raised the following concern " extern inline u32 readl(const volatile void __iomem *addr) { u32 ret = __raw_readl(addr); mb(); return ret; } extern inline void writel(u32 b, volatile void __iomem *addr) { __raw_writel(b, addr); mb(); } There is a barrier in writel /after/ the access but not before." Can somebody familiar with alpha evaluate this? Sinan -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. -- To unsubscribe from this list: send the line "unsubscribe linux-alpha" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
