On Fri, Dec 4, 2020 at 11:26 AM Verma, Vishal L <vishal.l.verma@xxxxxxxxx> wrote: > > On Fri, 2020-12-04 at 10:12 -0800, Ben Widawsky wrote: > > Hi Chris. > > > > On 20-12-04 12:40:03, Chris Browy wrote: > [..] > > > > > acpidump indicates the CXL0 and CXLM devices but no SRAT or HMAT tables are > > > in the dump which is curious. > > > > I don't typically use HMAT, but I do have an SRAT in mine, so that's strange. > > You should also have a CEDT. > > > I suspect an SRAT is only added if you have distinct numa nodes. Adding > a few '-numa node' bits to the qemu command line should be enough to > make that happen. For CXL-2.0-Type-3, BIOS is responsible for retrieving CDATs and synthesizing SRAT/SLIT/HMAT tables for the CXL.mem that is mapped by platform firmware. For CXL.mem that is mapped by the OS, there is no requirement to publish updated ACPI tables. CXL.mem mapped by the OS need only support native CXL memory enumeration and leave ACPI only for static platform resources.
