Hi Andy, > > Ok, I'll see how to integrate my PCI "investigation" about the > > identification of the correct path from the CPU to the final PCI > > device, through the various bridges of the board. > > I think that a general discourse about it can be useful to > > other people, too. > > I realized that here we have two items to document: > 1) the gpio-line-names property in [1]; > 2) PCI hierarchy in ACPI tables, which can be added into [3] under > the "PCI hierarchy representation" title or so. > > [3]: Documentation/firmware-guide/acpi/enumeration.rst OK, thanks for your guidelines! > > -- > With Best Regards, > Andy Shevchenko > Regards, Flavio
