On Thu, Oct 29, 2020 at 7:17 PM Andy Shevchenko <andy.shevchenko@xxxxxxxxx> wrote: > On Thu, Oct 29, 2020 at 4:55 PM Ricardo Ribalda <ribalda@xxxxxxxxxx> wrote: > > On Thu, Oct 29, 2020 at 3:45 PM Andy Shevchenko > > <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote: > > > On Wed, Oct 28, 2020 at 10:10:42PM +0100, Ricardo Ribalda wrote: > > ... > > > > ActiveLevel field is described in 19.6.55 GpioInt (GPIO Interrupt Connection > > > Resource Descriptor Macro). > > > > > > > Without using the active_low, how can we describe a pin that is > > > > active low and has to trigger an irq on both edges? > > > > > > This is nonsense. > > > What does it mean? > > > > Let me try to explain myself again: > > > > I have a gpio pin that produces IRQs on both edges. so ActiveLevel is Both > > > > The problem is that the value of that pin is inverted: Low means 1 and > > high means 0. > > > > How can I describe that the pin "is inverted" without using the _DSD field? > > "Both edges" and "inverted" or "polarity low" in one sentence make no sense. To be on the constructive side, I can *imagine* so badly designed hardware that uses level and edge at the same time, but before I go to conclusions, can you share relevant (pieces of) datasheet? -- With Best Regards, Andy Shevchenko
