From: Stanislav Spassov <stanspas@xxxxxxxxx>
Currently, all callers supply the same value, and in the future
pci_dev_wait itself could determine the appropriate timeout based on
values stored in struct pci_dev, and the reset type.
Signed-off-by: Stanislav Spassov <stanspas@xxxxxxxxx>
---
drivers/pci/pci.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 7e08c5f38190..9435e2b19f7b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1030,8 +1030,9 @@ void pci_wakeup_bus(struct pci_bus *bus)
pci_walk_bus(bus, pci_wakeup, NULL);
}
-static int pci_dev_wait(struct pci_dev *dev, char *reset_type, int timeout)
+static int pci_dev_wait(struct pci_dev *dev, char *reset_type)
{
+ int timeout = PCIE_RESET_READY_POLL_MS;
int delay = 1;
u32 id;
@@ -4514,7 +4515,7 @@ int pcie_flr(struct pci_dev *dev)
msleep(dev->delay[PCI_INIT_EVENT_FLR]);
- return pci_dev_wait(dev, "FLR", PCIE_RESET_READY_POLL_MS);
+ return pci_dev_wait(dev, "FLR");
}
EXPORT_SYMBOL_GPL(pcie_flr);
@@ -4553,7 +4554,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe)
msleep(dev->delay[PCI_INIT_EVENT_FLR]);
- return pci_dev_wait(dev, "AF_FLR", PCIE_RESET_READY_POLL_MS);
+ return pci_dev_wait(dev, "AF_FLR");
}
/**
@@ -4600,7 +4601,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
pci_dev_d3_sleep(dev);
- return pci_dev_wait(dev, "PM D3hot->D0", PCIE_RESET_READY_POLL_MS);
+ return pci_dev_wait(dev, "PM D3hot->D0");
}
/**
@@ -4842,7 +4843,7 @@ int pci_bridge_secondary_bus_reset(struct pci_dev *dev)
{
pcibios_reset_secondary_bus(dev);
- return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
+ return pci_dev_wait(dev, "bus reset");
}
EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset);
--
2.25.1
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