> > > > Hi Mika, > > > > The previous patches from Dmitry handled IRQ numbering, here we have a > > similar issue with GPIO to pin translation - hardcoded values in FW > > which do not agree with the (non-consecutive) numbering in newer > > kernels. > > Hmm, so instead of passing GpioIo/GpioInt resources to devices the > firmware uses some hard-coded Linux GPIO numbering scheme? Would you > able to share the exact firmware description where this happens? Actually it is a GPIO offset in ACPI tables for Braswell that was hardcoded in the old firmware to match the previous (consecutive) Linux GPIO numbering. > > > What GPIO(s) we are talking about and how does it show up to the user? > > > > As an example, the issue manifests itself when you run 'crossystem > > wpsw_cur'. On my Kefka it incorrectly reports the value as 1 instead > > of 0 when the write protect screw is removed. > > Is it poking GPIOs directly through sysfs relying the Linux GPIO > numbering (which can change and is fragile anyway)? I believe so, yes.
