On Wed, 2017-12-13 at 17:37 +0100, Hans de Goede wrote: > Hi, > > On 13-12-17 17:22, Johannes Stezenbach wrote: > > > > Please don't get confused with the other thread about clocks. > > This issue sets the "disable IP" bit, found by doing stupid > > experiments to enable S0ix on E200HA. > > Ah my bad. Oh, perhaps I also need to refresh my memory from that buglink. > > 1. no idea if Cherry Trail even has SATA IP, maybe this is a > > meaningless bit but PMC firmware carried over from > > Bay Trail looks at it > > > There are no CHT SoCs with SATA AFAIK, but Braswell SoCs, > which I believe is the same die do have SATA. > > I think the best fix here is to look at the model-string part > of the CPU-id and do a quirk based on that, setting the "disable IP" > bit for the SATA on all SoC models known to not have SATA > (Z8300, Z8350, Z8500, Z8550, Z8700, Z8750). > > Rafael, Andy how does that sound as a solution? Yeah, that bit is a property of PMC microcontroller and thus belongs to its driver in Linux kernel. To make it strict we need a matching property. AFAIR CPU model ID is all the same for all CHT and BSW SoCs, so, can't be used to distinguish them. So, you are thinking about comparing CPU model name then? It might work. However, SATA itself is a part of PCH, and thus can not exactly be matched by CPU ID. Btw, Pentium Celeron N-series according to spec has SATA host. -- Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> Intel Finland Oy -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
