On 07/09/17 02:55, Bob Liu wrote: > Speak to the invalidation, I have one more question. > > There is a time window between 1) modify page table; 2) tlb invalidate; > > ARM-CPU Device > > 1. modify page table > > ^^^^^ > Can still write data through smmu tlb even page table was already modified. > (At this point, the same virtual addr may not point to the same thing for CPU and device!!! > I'm afraid there may be some data-loss or other potential problems if this situation happens.) > > 2. tlb invalidate range The mm code serializes map/unmap operations with mm->mmap_sem, and at a lower level I think the pte lock is used to prevent more subtle races. Don't take my word for it though, mm/ is still very obscure to me. So the kernel shouldn't be able to reuse the VA for something else before the tlb invalidation completes. Even if you're using the CMDQ to invalidate instead of TLBI instructions, you're still called by a notifier from the mm code so there is no problem. Thanks, Jean -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
