On Thu, May 04, 2017 at 06:05:33PM +0530, Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@xxxxxxxxxx>
>
> Cavium ThunderX2 SMMU implementation doesn't support page 1 register space
> and PAGE0_REGS_ONLY option will be enabled as an errata workaround.
>
> This option when turned on, replaces all page 1 offsets used for
> EVTQ_PROD/CONS, PRIQ_PROD/CONS register access with page 0 offsets.
>
> Signed-off-by: Linu Cherian <linu.cherian@xxxxxxxxxx>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@xxxxxxxxxx>
> ---
> drivers/iommu/arm-smmu-v3.c | 44 ++++++++++++++++++++++++++++++++------------
> 1 file changed, 32 insertions(+), 12 deletions(-)
> static struct arm_smmu_option_prop arm_smmu_options[] = {
> + { ARM_SMMU_OPT_PAGE0_REGS_ONLY, "cavium-cn99xx,broken-page1-regspace"},
No patch in this series documented the new property.
Please update Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt,
with a description of the property. i.e. what it describes, and when it
should be set.
Please either make that a prepatory path, or merge it in with this one.
Thanksm
Mark.
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