On Tue, Apr 11, 2017 at 08:12:38PM +0530, linucherian@xxxxxxxxx wrote: > From: Linu Cherian <linu.cherian@xxxxxxxxxx> > > Cavium CN99xx SMMUv3 implementation has two Silicon Erratas. > 1. Errata ID #74 > SMMU register alias Page 1 is not implemented > 2. Errata ID #126 > SMMU doesnt support unique IRQ lines for gerror, eventq and cmdq-sync Is this device in production, or just part of a test chip? Will -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html