Re: [PATCH 0/2] additional sysfs entries for CPPC

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On 3/25/2017 7:32 AM, Rafael J. Wysocki wrote:
> On Friday, March 24, 2017 10:34:42 AM Prakash, Prashanth wrote:
>> On 3/3/2017 11:32 AM, Prakash, Prashanth wrote:
>>> Hi Rafael,
>>>
>>> On 2/13/2017 9:38 AM, Prakash, Prashanth wrote:
>>> [...]
>>>>>> Tested-by: Al Stone <ahs3@xxxxxxxxxx>
>>>>> I'm not actually sure about the assumption this series is based on.
>>>>>
>>>>> I don't see anything in the spec to guarantee that it will always be
>>>>> safe to evaluate _CPC only once and cache its output.
>>>> Among the Performance capabilities registers(section 8.4.7.1.1), the only
>>>> register that can change dynamically is Guaranteed performance register.
>>>> We are not supporting/using Guaranteed performance at the moment.
>>>>
>>>> Guaranteed performance Register has an associated Notify event which will be
>>>> invoked when it changes. No such events are associated with other capabilities
>>>> register. Similar distinction is made in the beginning of section 8.4.7.1.1:
>>>> "Figure 8-47 outlines the static performance thresholds of the platform
>>>>  and the dynamic guaranteed performance threshold."
>>>>
>>>> I agree spec isn't very clear about marking these registers as static except
>>>> that one sentence I quoted above, but there is enough in spec to guarantee
>>>> that the capabilities we are using will not change dynamically.
>>> Does the above sound reasonable? Any other feedback on this patch set?
>> Gentle Ping
> There are concerns that some CPPC parameters may change at run time on some
> systems even though the spec doesn't mention that possibility, so the optimization
> here may be premature.
Thanks Rafael!  I will remove the caching of CPPC perf caps and submit a patch to
add the sysfs entries with existing interface.

--
Thanks,
Prashanth

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